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Programming
  DLAB

You can notice that the table of registers contains the DLAB field. When DLAB is set to '0' or '1' a number of registers are changed. It is necessary as UART has 12 registers (including the work register) while using only 8 port addresses. When DLAB is set to '1' the line control registers become available, with the help of these registers you can set the connection rate measured in bits per second.

UART has a crystal, which supports the frequency 1.8432 MHZ. The UART incorporates a divide by 16 counter which simply divides the incoming clock signal by 16. The selection of 1.8432 MHZ frequency leads to maximum signal equalling to 115,200 hz, which allows UART to support sending and receiving at a rate of 115,200 Bits Per Second (BPS). This rate is ideal for fast modems and devices which can process such a rate, but on the other hand all the other devices would lack the possibility of connecting. That's why UART is equipped with Programmable Baud Rate Generator which us managed by two registers.

E.g., how do we get the connection rate of 2400 BPS? For this we should divide 115,200 by 48 to get clock frequency of 2400 hz. In this case "Divisor" is equal to 48, it is saved in two control registers "Divisor Latch Access Bit". This divisor may equal to 16-bit number (i.e. from 0 to 65535). As UART has only the 8-bit data bus, two registers are used. When we must write the information into the first register (base+0), we should set DLAB to 0, then the value is written into "Divisor latch low byte", and when the information must be written into the second register (base +1) , the DLAB is set to 1, and the value is saved into "Divisor latch high byte."

Below is the table with some standard rates and their divisor latch high bytes & low bytes.

Speed (BPS)Divisor (Dec)Divisor Latch High ByteDivisor Latch Low Byte
50230409h00h
30038401h80h
60019200hC0h
24004800h30h
48002400h18h
96001200h0Ch
19200600h06h
38400300h03h
57600200h02h
115200100h01h
Table of Commonly Used Baudrate Divisors
 
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